Layout Design of LC VCO with Current Mirror Using 0.18 µm Technology

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dc.contributor.authorPrasad, Namrata
dc.contributor.authorGamad, Radheshyam
dc.date.accessioned2016-10-27T09:41:09Z
dc.date.available2016-10-27T09:41:09Z
dc.date.issued2011-04
dc.description.abstractThis paper presents a new design of complementary oxide semiconductor voltage controlled oscillator (CMOS VCO) for improve tuning range and phase noise with low power consumption. Design is area efficient and easy to implement. Design is carried out in cadence and schematic editor using 180 nm technology. Simulation is done and performance results are reported. Results have been compared with earlier published work and improvements are obtained in this work.en_US
dc.identifier.citationWireless Engineering and Technology, 2011, 2, 102-106en_US
dc.identifier.urihttp://dx.doi.org/10.4236/wet.2011.22014
dc.identifier.urihttp://hdl.handle.net/123456789/1081
dc.language.isoenen_US
dc.publisherScientific Research Publishingen_US
dc.subjectVCOen_US
dc.subjectLC-Tanken_US
dc.subjectLow Phase Noiseen_US
dc.subjectLow Power Consumptionen_US
dc.subjectTuning Rangeen_US
dc.subjectSpiral Inductoren_US
dc.titleLayout Design of LC VCO with Current Mirror Using 0.18 µm Technologyen_US
dc.typeArticleen_US
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