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    Layout Design of LC VCO with Current Mirror Using 0.18 µm Technology

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    Date
    2011-04
    Author
    Prasad, Namrata
    Gamad, Radheshyam
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    Abstract
    This paper presents a new design of complementary oxide semiconductor voltage controlled oscillator (CMOS VCO) for improve tuning range and phase noise with low power consumption. Design is area efficient and easy to implement. Design is carried out in cadence and schematic editor using 180 nm technology. Simulation is done and performance results are reported. Results have been compared with earlier published work and improvements are obtained in this work.
    URI
    http://dx.doi.org/10.4236/wet.2011.22014
    http://hdl.handle.net/123456789/1081
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    • Computer Science & Communications [95]

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